As integrated circuit technology advances, tighter and tighter tolerances are required for frequency generation devices. Modern integrated circuits require frequency signals for clocking and other exacting tasks, where the quality of the signal may have a significant impact on performance. As such, frequency measurement of signals from frequency generation devices (e.g., crystals, oscillators, voltage-controlled oscillators, etc.) need to be both accurate and precise to ensure acceptable signals for use with modern integrated circuits.
Although several types of conventional frequency measurement devices are used, gated frequency counters are one of the most common. Gated frequency counters are N-bit counters which count repetitions of an input signal over a predetermined period of time, often referred to as the “gate time.” The count obtained during the gate time may then be divided by the gate time to determine the frequency of the input signal. Additionally, gated frequency counters have an error of +/−one count due to incorrect counting at either end of the gate time. As such, the error associated with frequency measurements using gated frequency counters is proportional to the count, where the error increases as the number of counts for a given frequency measurement decreases.
Despite their suitability for less-demanding applications, conventional implementations using gated frequency counters do not provide sufficient accuracy and precision for high-quality frequency measurements. For example, gated frequency counters often provide a low number of counts when measuring a frequency due to the use of a small gate time. Given that small counts produce large errors, frequency measurements taken with conventional gated frequency counters therefore have large errors making them unsuitable for more-demanding applications. Additionally, although an increase in the gate time of a conventional implementation using a frequency counter may provide a reduction in error, the reduction is very small and brings with it a large decrease in efficiency and increase in costs. As such, increasing the gate time is an undesirable option.